1 AM6544C analog power preliminary publication order number: ds-am6544_a these miniature surface mount mosfets utilize a high cell density trench process to provide low r ds(on) and to ensure minimal power loss and heat dissipation. typical a pplications are dc-dc converters and power management in portable and battery-powered products such as computers, printers, pcmcia cards, cellular and cordless telephones. p & n-channel 20-v (d-s) mosfet ?low r ds(on) provides higher efficiency and extends battery life ? low thermal impedance copper leadframe tssop-8 saves board space ? fast switching speed ? high performance trench technology notes a. surface mounted on 1? x 1? fr4 board. b. pulse width limited by maximum junction temperature tssop-8 top view d1 s1 s1 1 2 3 d 1 s 1 g 1 n-channel mosfet 4 g1 d2 s2 s2 8 7 6 5 g2 s 2 d 2 g 2 p-channel mosfet v ds (v) r ds(on) m( ? )i d (a) 32 @ v gs = 10v 4.3 46 @ v gs = 4.5v 3.7 52 @ v gs = -10v -3.8 80 @ v gs = -4.5v -2.8 30 product summary -30 symbol n-channel p-channel units v ds 30 -30 v gs 20 20 t a =25 o c 4.3 -3.8 t a =70 o c 3.5 -3.0 i dm 20 -20 i s 1.0 -1.0 a t a =25 o c 1.14 1.14 t a =70 o c0.730.73 t j , t stg -55 to 150 -55 to 150 o c continuous source current (diode conduction) a absolute maximum ratings (t a = 25 o c unless otherwise noted) parameter pulsed drain current b v gate-source voltage drain-source voltage continuous drain current a i d a power dissipation a p d operating junction and storage temperature range w symbol typ max t <= 10 sec 88 110 steady state 120 150 thermal resistance ratings maximum junction-to-ambient a o c/w r thja parameter
2 AM6544C analog power preliminary publication order number: ds-am6544_a notes a. pulse test: pw <= 3 00us duty cycle <= 2%. b. guaranteed by design, not subject to production testing. analog power (apl) reserves the right to make changes without further notic e to any products herein. apl makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does apl assume any liability arising ou t of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, conseque ntial or incidental damages. ?typical? parameters which may be provided in apl data sheet s and/or specifications can a nd do vary in different appli cations and actual performance may vary over time. all operating parameters , including ?typicals? must be validated for each customer appl ication by customer?s technical experts. apl does not convey any license under its patent rights nor the rights of others. apl products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications int ended to support or sustain life, or for any other application in which the failure of the apl product could create a situation where personal inju ry or death may occur. should buyer purchase or use apl products for any such uninte nded or unauthorized application, buyer shall indemnify and hold a pl and its officers, employees, subsidiari es, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirect ly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that apl was negligent regarding the design or m anufacture of the part. apl is an equal opportunity/affirmative action employer. ch min t y pmax v gs = v ds , i d = 250 ua n 1.0 v gs = v ds , i d = -250 ua p -1.0 v gs = 20 v, v ds = 0 v n100 v gs = -20 v, v ds = 0 v p100 v ds = 16 v, v gs = 0 v n1 v ds = -16 v, v gs = 0 v p-1 v ds = 5 v, v gs = 10 v n20 v ds = -5 v, v gs = -10 v p-20 vgs = 10 v, i d = 4.3 a 32 vgs = 4.5 v, i d = 3.7 a 46 vgs = -10 v, i d = -3.8 a 52 vgs = - 4 . 5 v, i d = -2.8 a 80 v ds = 15 v, i d = 4.3 a n 11 v ds = -15 v, i d = -3.8 a p 11 n4.7 p8.0 n1.8 p2.3 n1.5 p4.5 n13 p14 n14 p14 n30 p40 n30 p30 forward tranconductance a g fs s nc ga t e -dra in ch a rg e q gd d y namic limits unit specifications (t a = 25 o c unless otherwise noted) na static te s t conditions v symbol parame ter gate-threshold voltage on-state drain current a i d(on) v gs(th) a gate-body leakage i gss ua i dss zero gate voltage drain current m ? total gate charge q g gate-source charge q gs n-channel v ds =15v, v gs =4.5v, i d =4.3a p-channel v ds =-15v, v gs =-4.5v, i d =-3.8a drain-source on-resistance a r ds(on) n p turn-on delay time ris e time ns n-chaneel v dd =15v, v gs =4.5v, i d =1a , r ge n =6 ? , p-channel v dd =-15v, v gs =-4.5v, i d =-1a r gen =6 ? fall-time t f turn-off delay time t d(on) t r t d(off)
3 AM6544C analog power preliminary publication order number: ds-am6544_a package information tssop-8: 8lead
|
